Intel - Pentium Pro II MMX (P II MMX)

From www.intel.com Feb 1998

From www.intel.com [Aug 97]

• The Pentium II processor with Intel's MMX Media Enhancement Technology, has 7.5M transistors and is based on 0.25µ CMOS Process Technology. This technology enables a smaller die allowing increased core frequencies and reduced power consumption
• 32 bit technology.
• At 333 MHz, the Pentium II processor delivers a 75% to 150% performance boost compared to the 233 MHz Pentium processor with MMX Technology and approximately 50% more performance on multimedia benchmarks.
• Dual Independent Bus architecture for high bandwidth and performance.
• 32KByte (16K/16K) non-blocking level one cache. 512KByte unified, non-blocking level two cache.
• Enables systems which are scalable up to two processors and 64GByte of physical memory.
• Binary compatible with previous generation Intel Architecture processors
• Data integrity and reliability features include system bus and L2 cache bus ECC, Fault Analysis, Recovery, and Functional Redundancy Checking.
• Single Edge Contact (S.E.C.) cartridge packaging technology delivers high performance processing and bus technology to mainstream systems. The core and L2 cache are fully enclosed in a plastic and metal cartridge. These sub-components are surface mounted directly to a substrate inside the cartridge to enable high-frequency operation. The S.E.C. cartridge technology allows the use of widely available, high-performance industry BSRAMs for the dedicated L2 cache, enabling high-performance processing at mainstream price points. Also, this cartridge technology allows the Pentium® II processor to use the same high performance Dual Independent Bus architecture used in the Pentium® Pro processor.
• 233-333MHz uses LX chipset 1GBps from CPU to L2 cache, 533MBps bandwidth between chipset and main system memory, and 66MHz system bus.
• 350 and 400MHz with BX chipset use a system bus running at 100MHz.
• Accelerated Graphics Port (AGP) support.
• Celeron
  • 266MHz (Apr 98) a PII MMX minus L2 cache and without plastic cover (supplied on a printed circuit board), fitting into a Slot 1 SEC.
  • Built for Intel "Maui" motherboard (built in AGP and 32bit Yamaha sound).
• Mendocino
  • 300MHz with 128Kb L2 cache (introduced 1998 and will replace non-L2 Celeron).
• Deschutes
  • 400MHz on 100MHz bus. (expected to pass 1000MHz by year 2000)
  • Uses SE440BX chipset (AGPset) for 100MHz bus, 1.6GBps between CPU and L2, 800MBps pipe between cipset and main system memory (and AGP 3D if installed).

Keall, C. (98 May) From www.intel.com Aug 1997, Feb 1998